Aerolite Logo 🛰️ Hybrid Analog–FPGA Computing Architecture for Space Instruments

Analog Speed. Digital Flexibility. Space Ready.

🏗️ System Architecture Overview

🔧 Control Section
  • Radiation hardened for deep space (100krad TID)
  • No Single Event Latch-ups (SEL) up to >100 MeV
  • Cold redundant architecture
  • System health monitoring
  • Mission critical decision making
⚡ Processing Section
  • Radiation tolerant FPGA (Kintex UltraScale)
  • Low power Mythic AI chip for ML processing
  • High-speed analog compute modules
  • Parallel signal processing capabilities
  • Real-time data compression & encoding
📡 RF Communication
  • X-band link with Uranus Orbiter Platform
  • UHF/X-band link with impactor probe
  • AD9371 transceiver (300 MHz - 6 GHz)
  • Direct sampling & upconversion
  • Store and forward data relay
🧮 Analog Compute Engine
  • Modular analog processing cards
  • Real-time signal analysis
  • Continuous computation capabilities
  • Low latency parallel processing
  • Hot-swappable compute modules
🔋 Power Management
  • Multi-stage power conversion
  • Isolated analog/digital supplies
  • Dynamic power scaling
  • Fault-tolerant distribution
  • Battery backup systems
💾 Data Storage
  • High-speed DDR3 memory arrays
  • Radiation-tolerant NAND flash
  • Configuration storage (NOR flash)
  • Science data buffering
  • Error correction & redundancy

🔗 MRD and PDR

Mission Definition Review Preliminary Design Review

🔗 System Interconnection Architecture

Backplane Architecture

👥 Project Team

Viduranga Landers
Viduranga Landers
University of Colombo
Oshadha Pathirana
Oshadha Pathirana
University of Moratuwa
Harshith Aluvihare
Harshith Aluvihare
Sri Lanka Technology Campus
Lisitha Dissanayake
Lisitha Dissanayake
University of Colombo
Adeepa
Adeepa Gunathilaka
Informatics Institute of Technology - Sri Lanka

🛰️ 2025 Project Aerolite. All rights reserved.

Designed for advanced aerospace instrumentation and mission-critical systems.